Field of the Invention
The present invention relates to a method and apparatus for detecting an internal crack generated in processing a workpiece.
Description of the Related Art
A plurality of devices such as integrated circuits (ICs) and large-scale integrations (LSIs) are formed on the front side of a substrate so as to be separated by a plurality of crossing division lines, thus forming a wafer having the plural devices on the front side. The back side of this wafer is ground by a grinding apparatus to reduce the thickness of the wafer. Thereafter, the wafer is divided along the division lines into individual device chips by using a dicing apparatus (see Japanese Patent Laid-open No. 2010-123823, for example) or a laser processing apparatus (see Japanese Patent Laid-open No. 2011-033383, for example). The device chips thus obtained are used in electrical equipment such as mobile phones and personal computers.
In the step of stacking a plurality of circuits on the front side of the substrate, there is a case that cracks may be generated in the wafer due to internal stress such as thermal stress. Further, there is a problem such that the cracks may be left in the wafer after performing a grinding step, causing a reduction in quality of the devices. It is desired to detect whether or not the cracks are left at the time the back grinding of the wafer has been finished.